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Core8051
Product Summary
– Wait Cycles to Access Fast/Slow ROM
– Dual Data Pointer to Fast Data Block Transfer
Intended Use
? Embedded System Control
? Communication System Control
?
?
Special Function Register (SFR) Interface
– Services up to 101 External SFRs
Optional On-Chip Instrumentation (OCI) Debug
Logic
?
I/O Control
?
Supports all Major Actel Device Families
Key Features
?
Optional Power-Saving Modes
?
?
?
?
100% ASM51 (8051/80C31/80C51) Compatible
Instruction Set 1
Control Unit
– 8-Bit Instruction Decoder
– Reduced Instruction Time of up to 12 Cycles
Arithmetic Logic Unit
– 8-Bit Arithmetic and Logical Operations
– Boolean Manipulations
–
8 by 8-Bit Multiplication and 8 by 8-Bit Division
32-Bit I/O Ports
Supported Families
? Fusion
? ProASIC3/E
? ProASIC PLUS
? Axcelerator
? RTAX-S
? SX-A
? RTSX-S
Core Deliverables
– Four 8-Bit I/O Ports
– Alternate Port Functions, such as External
Interrupts, Provide Extra Port Pins when
Compared with the Standard 8051
?
Evaluation Version
– Compiled RTL Simulation Model Fully Supported in
the Actel Libero ? Integrated Design Environment
(IDE)
?
?
?
Serial Port
– Simultaneous Transmit and Receive
– Synchronous Mode, Fixed Baud Rate
– 8-Bit UART Mode, Variable Baud Rate
– 9-Bit UART Mode, Fixed Baud Rate
– 9-Bit UART Mode, Variable Baud Rate
– Multiprocessor Communication
Two 16-Bit Timer/Counters
Interrupt Controller
– Four Priority Levels with 13 Interrupt Sources
?
?
?
Netlist Version
– Structural Verilog and VHDL Netlists (with and
without I/O Pads) Compatible with the Actel
Designer Software Place-and-Route Tool
– Compiled RTL Simulation Model Fully
Supported in Actel Libero IDE
RTL Version
– Verilog and VHDL Core Source Code
– Core Synthesis Scripts
Testbench (Verilog and VHDL)
?
?
Internal Data Memory Interface
– Can Address up to 256B of Data Memory Space
External Memory Interface
– Can Address up to 64kB of External Program
Memory
– Can Address up to 64kB of External Data
Memory
– Demultiplexed Address/Data Bus Enables Easy
Connection to Memory
– Variable Length MOVX to Access Fast/Slow
Synthesis and Simulation Support
? Synthesis
– Synplicity ?
– Synopsys ? (Design Compiler TM , FPGA Compiler TM ,
FPGA Express TM )
– Exemplar TM
? Simulation
– OVI - Compliant Verilog Simulators
– Vital - Compliant VHDL Simulators
RAM or Peripherals
1. For more information, see the Core8051 Instruction Set Details User’s Guide
December 2005
? 2005 Actel Corporation
v 6 .0
1
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